{"id":7178,"date":"2022-02-13T22:48:21","date_gmt":"2022-02-13T17:18:21","guid":{"rendered":"https:\/\/nuclearrambo.com\/wordpress\/?p=7178"},"modified":"2024-10-03T15:08:02","modified_gmt":"2024-10-03T09:38:02","slug":"capturing-video-with-petalinux-part-1-the-hardware-design","status":"publish","type":"post","link":"https:\/\/nuclearrambo.com\/wordpress\/capturing-video-with-petalinux-part-1-the-hardware-design\/","title":{"rendered":"Capturing video with Petalinux &#8211; Part 1 &#8211; The hardware design"},"content":{"rendered":"\n<p><span data-preserver-spaces=\"true\">In one of the previous articles, I showed you how you could build a basic design on&nbsp;<\/span><a class=\"editor-rtfLink\" href=\"https:\/\/nuclearrambo.com\/wordpress\/running-petalinux-on-zynq-soc-from-scratch-zybo-board\/\" target=\"_blank\" rel=\"noopener\"><span data-preserver-spaces=\"true\">Zynq SoC and boot Petalinux<\/span><\/a><span data-preserver-spaces=\"true\"> over it. This article would be an extension to the previous one. Our goal for this time would be capturing video frames and saving them as raw files. Sounds simple when you have the entire Linux already set up for you. When it comes to building one from scratch, it won&#8217;t be very easy. Especially, when you are doing it all for the first time. It took me several week&#8217;s worth of effort that included reading documentation, forums posts and trying out various things. For some, the amount of struggle might be lower than what I had to endure throughout the process. Nevertheless, it was an interesting project that I would be presenting here in multiple parts. Well, multiple parts, because I am still not done yet.<\/span><\/p>\n\n\n\n<center><p><script type=\"text\/javascript\">\n\tatOptions = {\n\t\t'key' : 'a488f095e80c8a74746e5fdca977eaea',\n\t\t'format' : 'iframe',\n\t\t'height' : 90,\n\t\t'width' : 728,\n\t\t'params' : {}\n\t};\n\tdocument.write('<scr' + 'ipt type=\"text\/javascript\" src=\"http' + (location.protocol === 'https:' ? 's' : '') + ':\/\/www.profitabledisplaynetwork.com\/a488f095e80c8a74746e5fdca977eaea\/invoke.js\"><\/scr' + 'ipt>');\n<\/script><\/p><\/center>\n\n\n\n<h2 class=\"wp-block-heading\">The hardware design<\/h2>\n\n\n\n<p><span data-preserver-spaces=\"true\">The hardware design consists of the Zynq Processing System block configured to output an additional clock of 144.9 MHz to support full HD resolution. You could work with lower clock speeds but that might reduce your frame rate as you go for higher resolution frames.<\/span><\/p>\n\n\n\n<p><span data-preserver-spaces=\"true\">Next, we add the Video test pattern generator (TPG) and video frame buffer writer blocks. If you are struggling with this part, I highly recommend you read&nbsp;<\/span><a class=\"editor-rtfLink\" href=\"https:\/\/nuclearrambo.com\/wordpress\/running-petalinux-on-zynq-soc-from-scratch-zybo-board\/\" target=\"_blank\" rel=\"noopener\"><span data-preserver-spaces=\"true\">my previous article<\/span><\/a><span data-preserver-spaces=\"true\">&nbsp;and then come back here.<\/span><\/p>\n\n\n\n<p><span data-preserver-spaces=\"true\">You will also need to add the video timing controller (VTC) block. As such, this block isn&#8217;t very useful if you aren&#8217;t pushing your video out through any display interface. The TPG Linux driver looks for the timing controller and fails if it isn&#8217;t in the design. This reason forces us to include the VTC block in spite of not pushing the video out over any interface.<\/span><\/p>\n\n\n\n<p><span data-preserver-spaces=\"true\">Also, add the AXI GPIO block in your design and this is required by the&nbsp;<\/span><a class=\"editor-rtfLink\" href=\"https:\/\/xilinx-wiki.atlassian.net\/wiki\/spaces\/A\/pages\/18841767\/Xilinx+V4L2+driver\" target=\"_blank\" rel=\"noopener\"><span data-preserver-spaces=\"true\">Video4Linux2 (V4L2) API<\/span><\/a><span data-preserver-spaces=\"true\">. This AXI GPIO block will connect to the reset pins of the&nbsp;<\/span><a class=\"editor-rtfLink\" href=\"https:\/\/www.xilinx.com\/support\/documentation\/ip_documentation\/v_tpg\/v8_0\/pg103-v-tpg.pdf\" target=\"_blank\" rel=\"noopener\"><strong><span data-preserver-spaces=\"true\">test pattern generator<\/span><\/strong><\/a><span data-preserver-spaces=\"true\">&nbsp;and the<\/span><a class=\"editor-rtfLink\" href=\"https:\/\/www.xilinx.com\/support\/documentation\/ip_documentation\/v_frmbuf\/v2_1\/pg278-v-frmbuf.pdf\" target=\"_blank\" rel=\"noopener\"><span data-preserver-spaces=\"true\">&nbsp;<\/span><strong><span data-preserver-spaces=\"true\">frame buffer writer<\/span><\/strong><span data-preserver-spaces=\"true\">&nbsp;<\/span><\/a><span data-preserver-spaces=\"true\">that we have in the system. When we finally have our system ready for use, we would be using V4L2 for configuring our video pipeline. It&#8217;s during the configuration stage when V4L2 asserts a reset signal to reset the components of the video pipeline.<\/span><\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Reset block<\/h3>\n\n\n\n<p>Initially, while building the design and trying out things, I assumed that I don&#8217;t need a controllable reset system. The whole thing gets reset at power-on anyway, so what&#8217;s the need for a controllable reset? When I tried booting the system, the driver threw an error saying that it wasn&#8217;t able to find the reset property for the device. While going through the driver source code, I realized that the V4L2 tries to reset the component and eventually fails when it&#8217;s unable to do that. Therefore, we need some sort of reset-ability which could come either from AXI GPIO or the Zynq&#8217;s hard GPIO peripheral.<br>You can find the final block design of our system below.<\/p>\n\n\n\n<p>.<\/p>\n\n\n\n<div class=\"mceTemp\">&nbsp;<\/div>\n\n\n\n<figure class=\"wp-block-image alignnone\"><a href=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/zynq_vcap_bd-1.png\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"540\" src=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/zynq_vcap_bd-1-1024x540.png\" alt=\"Video capture system block design\" class=\"wp-image-7184\" srcset=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/zynq_vcap_bd-1-1024x540.png 1024w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/zynq_vcap_bd-1-300x158.png 300w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/zynq_vcap_bd-1-768x405.png 768w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/zynq_vcap_bd-1-1536x810.png 1536w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/zynq_vcap_bd-1-2048x1079.png 2048w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/a><figcaption class=\"wp-element-caption\">Video capture system block design<\/figcaption><\/figure>\n\n\n\n<p><span data-preserver-spaces=\"true\">I am using the Zybo 7010 board for this project and the board files helped me auto-configure most of the Zynq PS system. Make sure you enable UART0 in the PS because that&#8217;s how we will communicate with the board when we boot it up. I have uploaded the&nbsp;<\/span><a class=\"editor-rtfLink\" href=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/vcap_tpg.txt\" target=\"_blank\" rel=\"noopener\"><span data-preserver-spaces=\"true\">board design tcl file<\/span><\/a><span data-preserver-spaces=\"true\">&nbsp;which will help you recreate the whole project quite easily.<\/span><\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Export the hardware file and start building petalinux<\/h3>\n\n\n\n<p>The basic steps to build petalinux were shown in my previous article where we built Petalinux from scratch. Most of those steps will remain untouched except for the addition of a few extra steps. Therefore, I will only be showing the added extra steps here to avoid making the article too long.<\/p>\n\n\n\n<p><code data-enlighter-language=\"shell\" class=\"EnlighterJSRAW\">petalinux-config -c rootfs<\/code><\/p>\n\n\n\n<p>This should open the following window where you need to select certain features.<\/p>\n\n\n\n<figure class=\"wp-block-image alignnone\"><a href=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/petalinux_pkg.png\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"641\" src=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/petalinux_pkg-1024x641.png\" alt=\"petalinux v4l2\" class=\"wp-image-7185\" srcset=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/petalinux_pkg-1024x641.png 1024w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/petalinux_pkg-300x188.png 300w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/petalinux_pkg-768x481.png 768w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/petalinux_pkg.png 1213w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/a><figcaption class=\"wp-element-caption\">Petalinux rootfs image package configuration<\/figcaption><\/figure>\n\n\n\n<p>You need to select the v4l2utils. Additionally, you may also select openCV and the rest of the features that you might consider useful.<\/p>\n\n\n\n<figure class=\"wp-block-image alignnone\"><a href=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/Screenshot_2022-02-13_17-12-29.png\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"641\" src=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/Screenshot_2022-02-13_17-12-29-1024x641.png\" alt=\"petalinux v4l2utils\" class=\"wp-image-7186\" srcset=\"https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/Screenshot_2022-02-13_17-12-29-1024x641.png 1024w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/Screenshot_2022-02-13_17-12-29-300x188.png 300w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/Screenshot_2022-02-13_17-12-29-768x480.png 768w, https:\/\/nuclearrambo.com\/wordpress\/wp-content\/uploads\/2022\/02\/Screenshot_2022-02-13_17-12-29.png 1210w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/a><figcaption class=\"wp-element-caption\">V4L2 utils<\/figcaption><\/figure>\n\n\n\n<p>Usually, the next step would be to build petalinux but we are going to wait because there&#8217;s something more we need to do. That something is defining the video pipeline in the device tree.<\/p>\n\n\n\n<center><p><script type=\"text\/javascript\">\n\tatOptions = {\n\t\t'key' : 'a488f095e80c8a74746e5fdca977eaea',\n\t\t'format' : 'iframe',\n\t\t'height' : 90,\n\t\t'width' : 728,\n\t\t'params' : {}\n\t};\n\tdocument.write('<scr' + 'ipt type=\"text\/javascript\" src=\"http' + (location.protocol === 'https:' ? 's' : '') + ':\/\/www.profitabledisplaynetwork.com\/a488f095e80c8a74746e5fdca977eaea\/invoke.js\"><\/scr' + 'ipt>');\n<\/script><\/p><\/center>\n\n\n\n<h2 class=\"wp-block-heading\">Defining the device tree<\/h2>\n\n\n\n<p>Fortunately, the base system device tree gets auto-generated by the device tree generator built scripts built into Petalinux. Nevertheless, Petalinux puts the job of defining video pipeline interconnection upon the user.<\/p>\n\n\n\n<p>Automatically generated device tree resides in the following path:<\/p>\n\n\n\n<p><code data-enlighter-language=\"shell\" class=\"EnlighterJSRAW\"> \/&lt;project_dir&gt;\/components\/plnx_workspace\/device-tree\/device-tree<\/code><\/p>\n\n\n\n<p>We won&#8217;t be touching any of the files in this directory. All the files in this directory are auto-generated by Petalinux every time you build it. Edit the following file to add our video pipeline.<\/p>\n\n\n\n<p><code data-enlighter-language=\"shell\" class=\"EnlighterJSRAW\">\/&lt;project_dir&gt;\/project-spec\/meta-user\/recipes-bsp\/device-tree\/system-user.dtsi<\/code><\/p>\n\n\n\n<p>The <span style=\"font-family: courier new, courier;\">system-user.dtsi<\/span> file tells Petalinux about manual device tree entries. The V4L2 expects you to specify what component connects to what. In addition to that, we also specify the video format, pixel width, reset pin, port direction and so on.<\/p>\n\n\n\n<pre class=\"EnlighterJSRAW\" data-enlighter-language=\"c\" data-enlighter-theme=\"\" data-enlighter-highlight=\"\" data-enlighter-linenumbers=\"\" data-enlighter-lineoffset=\"\" data-enlighter-title=\"\" data-enlighter-group=\"\">\/include\/ \"system-conf.dtsi\"\n\/ {\n};\n#include &lt;dt-bindings\/media\/xilinx-vip.h>\n\n&amp;amba_pl {\n    v_frmbuf_wr_0: v_frmbuf_wr@43c00000 {\n            #dma-cells = &lt;1>;\n            clock-names = \"ap_clk\";\n            clocks = &lt;&amp;clkc 15>;\n            compatible = \"xlnx,v-frmbuf-wr-2.2\", \"xlnx,axi-frmbuf-wr-v2.1\";\n            interrupt-names = \"interrupt\";\n            interrupt-parent = &lt;&amp;intc>;\n            interrupts = &lt;0 29 4>;\n            reg = &lt;0x43c00000 0x10000>;\n            reset-gpios = &lt;&amp;axi_gpio_0 1 0 1>;\n            xlnx,dma-addr-width = &lt;32>;\n            xlnx,dma-align = &lt;8>;\n            xlnx,max-height = &lt;2160>;\n            xlnx,max-width = &lt;3840>;\n            xlnx,pixels-per-clock = &lt;1>;\n            xlnx,s-axi-ctrl-addr-width = &lt;0x7>;\n            xlnx,s-axi-ctrl-data-width = &lt;0x20>;\n            xlnx,vid-formats = \"bgr888\", \"uyvy\", \"y8\", \"yuyv\";\n            xlnx,video-width = &lt;8>;\n        };\n\n    v_tpg_0: v_tpg@43c10000 {\n        compatible = \"xlnx,v-tpg-8.1\", \"xlnx,v-tpg-7.0\";\n        reg = &lt;0x43c10000 0x10000>;\n        xlnx,vtc = &lt;&amp;v_tc_0>;\n        reset-gpios = &lt;&amp;axi_gpio_0 0 0 1>;\n        ports {\n             #address-cells = &lt;1>;\n             #size-cells = &lt;0>;\n \n            port@0 {\n                reg = &lt;0>;\n                xlnx,video-format = &lt;XVIP_VF_YUV_422>;\n                xlnx,video-width = &lt;8>;\n\n                tpg_out: endpoint {\n                    remote-endpoint = &lt;&amp;vcap_tpg_in>;\n                };\n            };\n        };\n    };\n \n    vcap_tpg {\n        compatible = \"xlnx,video\";\n        dmas = &lt;&amp;v_frmbuf_wr_0 1>;\n        dma-names = \"port0\";\n        ports {\n             #address-cells = &lt;1>;\n             #size-cells = &lt;0>;\n \n            port@0 {\n                reg = &lt;0>;\n                direction = \"input\";\n                vcap_tpg_in: endpoint {\n                    remote-endpoint = &lt;&amp;tpg_out>;\n                };\n            };\n        };\n    };\n};<\/pre>\n\n\n\n<p>I have practically copy-pasted my entire system-user.dtsi file for your reference. When you read carefully, the TPG has one output port that&#8217;s mentioned as tpg_out and it connects to its &#8216;remote-endpoint&#8217; vcap_tpg_in mentioned in the next block of code just below it.<\/p>\n\n\n\n<p>You must read the pl.dtsi that resides alongside system-conf.dtsi in the auto-generated device tree directory. There are times when the auto-generator script fails to identify all the properties in your hardware. For example, when I was building this system, the pl.dtsi did not mention any reset property for the TPG. Hence, I added it manually in the system-user.dtsi file.<\/p>\n\n\n\n<p><code data-enlighter-language=\"c\" class=\"EnlighterJSRAW\">reset-gpios = &lt;&amp;axi_gpio_0 0 0 1&gt;;<\/code><\/p>\n\n\n\n<p>Now, its time to build the petalinux system by running,<\/p>\n\n\n\n<p><code data-enlighter-language=\"shell\" class=\"EnlighterJSRAW\">petalinux-build<\/code><\/p>\n\n\n\n<p>This may take quite a while depending on your machine. Sit back and let it finish. Finally, when the build completes, we need to package it with the following command.<\/p>\n\n\n\n<div class=\"crayon-pre\">\n<div id=\"crayon-61fac227928bf549624191-1\" class=\"crayon-line\"><code data-enlighter-language=\"powershell\" class=\"EnlighterJSRAW\"><span class=\"crayon-i\">petalinux<\/span>-<span class=\"crayon-t\">package<\/span> --<span class=\"crayon-i\">boot<\/span> --<span class=\"crayon-i\">force<\/span> --<span class=\"crayon-e\">fsbl <\/span><span class=\"crayon-i\">images<\/span>\/<span class=\"crayon-i\">linux<\/span>\/<span class=\"crayon-i\">zynq_fsbl<\/span><span class=\"crayon-sy\">.<\/span><span class=\"crayon-i\">elf<\/span> --<span class=\"crayon-e\">fpga <\/span><span class=\"crayon-i\">images<\/span>\/<span class=\"crayon-i\">linux<\/span>\/<span class=\"crayon-i\">system<\/span><span class=\"crayon-sy\">.<\/span><span class=\"crayon-i\">bit<\/span> --<span class=\"crayon-i\">u<\/span>-<span class=\"crayon-i\">boot<\/span><\/code><\/div>\n<div>\n<p>Eventually, load the following files onto the FAT32 partition of the SD card.<\/p>\n<ol class=\"has-background\">\n<li>BOOT.bin<\/li>\n<li>boot.scr<\/li>\n<li>image.ub<\/li>\n<\/ol>\n<p>Extract the rootfs archive onto the ext4 partition as follows.<\/p>\n<p><code data-enlighter-language=\"shell\" class=\"EnlighterJSRAW\"><span class=\"crayon-i\">tar<\/span> -<span class=\"crayon-e\">xzvf <\/span><span class=\"crayon-i\">rootfs<\/span><span class=\"crayon-sy\">.<\/span><span class=\"crayon-i\">tar<\/span><span class=\"crayon-sy\">.<\/span><span class=\"crayon-i\">gz<\/span> -<span class=\"crayon-i\">C<\/span> \/<span class=\"crayon-i\">media<\/span>\/<span class=\"crayon-i\">nuclearrambo<\/span>\/<span class=\"crayon-i\">root_partition<\/span>\/&nbsp;<\/code><\/p>\n<\/div>\n<h2>Booting the system<\/h2>\n<p>While booting the system, we are interested in knowing whether the TPG, VTC and the Framebuffer get probed and initialized during boot. To be honest, I struggled a lot while getting past this stage. The error codes given out by the drivers help in debugging the problematic areas in our setup. For example, the TPG driver may give out different error codes depending on the problem. Sometimes, all you may see is an error code &#8220;-2&#8221;. The <a href=\"https:\/\/github.com\/torvalds\/linux\/blob\/master\/include\/uapi\/asm-generic\/errno-base.h\">linux error code list<\/a> clearly comes in handy while figuring out the error. While looking up the error codes, &#8220;-2&#8221; comes as a result of accessing an invalid directory\/resource. A clear indication of non-existence of whatever the driver code was looking for. At times, I had to deal with the error &#8220;-22&#8221;; an indication of an invalid argument.<\/p>\n<p>Therefore, keep an eye for errors while booting the system. Once the boot process ends, the TPG gets registered as a <span style=\"font-family: courier new, courier;\">\/dev\/v4l-subdev0<\/span> entry. Whereas, the pipeline should show up as <span style=\"font-family: courier new, courier;\">\/dev\/video0<span style=\"font-family: Open Sans;\">. <\/span><\/span><\/p>\n<pre class=\"EnlighterJSRAW\" data-enlighter-language=\"shell\" data-enlighter-title=\"Boot messages\">root@linuxboot:~#  dmesg | grep \"v_frmbuf_wr\\|vcap_tpg\\|v_tc\\|v_tpg\"\nxilinx-frmbuf 43c00000.v_frmbuf_wr: Xilinx AXI frmbuf DMA_DEV_TO_MEM\nxilinx-frmbuf 43c00000.v_frmbuf_wr: Xilinx AXI FrameBuffer Engine Driver Probed!!\nxilinx-video amba_pl:vcap_tpg: device registered\nxilinx-video amba_pl:vcap_tpg: Entity type for entity 43c10000.v_tpg was not initialized!\nxilinx-vtc 43c20000.v_tc: device found, version 6.020\n<\/pre>\n<p>Lets check whether video0, media0, v4l-subdev0 show up in our devices list &#8220;\/dev\/&#8221;.<\/p>\n<pre class=\"EnlighterJSRAW\" data-enlighter-language=\"shell\">root@linuxboot:~# ls \/dev\/ | grep \"video0\\|media0\\|v4\"\nmedia0\nv4l\nv4l-subdev0\nvideo0\n<\/pre>\n<p>Seems we are good to go. Apparently, theres more than half way to go across before we can actually capture raw video frames coming in from the test pattern generator. In one of the next articles, I will also describe in detail the crude debugging process that I followed to get to the point we are at. Professionals might call my methods crude and raw, but sometimes, when you have no help from anyone, YOU DO WHAT YOU MUST DO!<\/p>\n<h2>Conclusion<\/h2>\n<p>So far, it&#8217;s been good progress towards our end goal and our video pipeline now appears in the devices. In the next part, I will show you the test pattern generator configuration and maybe an attempt at capturing raw frames from the test pattern generator.<\/p>\n<p>You may also check the following projects that I did around the Zybo 7010 Zynq SoC board.<\/p>\n<ol>\n<li><a href=\"https:\/\/nuclearrambo.com\/wordpress\/programming-the-zynq-7000-with-vivado-2019-2-and-vitis\/\">Zynq with Vitis<\/a><\/li>\n<li><a href=\"https:\/\/nuclearrambo.com\/wordpress\/a-basic-on-screen-display-with-vivado-hls-and-zynq-soc-part-1\/\">Trying out HLS Part 1<\/a><\/li>\n<li><a href=\"https:\/\/nuclearrambo.com\/wordpress\/a-basic-on-screen-display-with-vivado-hls-and-zynq-soc-part-2\/\">Trying out HLS Part 2<\/a><\/li>\n<\/ol>\n<p><\/p><wp-block data-block=\"core\/more\"><\/wp-block>\n<\/div>\n<h4>Incoming search terms:<\/h4><ul><li><a href=\"https:\/\/nuclearrambo.com\/wordpress\/capturing-video-with-petalinux-part-1-the-hardware-design\/\" title=\"linux capture from v4l-subdev\">linux capture from v4l-subdev<\/a><\/li><\/ul>","protected":false},"excerpt":{"rendered":"<p>In one of the previous articles, I showed you how you could build a basic design on&nbsp;Zynq SoC and boot Petalinux over it. This article would be an extension to the previous one. Our&#46;&#46;&#46;<\/p>\n","protected":false},"author":1,"featured_media":7189,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1212,1562],"tags":[1746,1769,1777,308,1745],"class_list":["post-7178","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-electronics-2","category-tutorials","tag-fpga","tag-petalinux","tag-v4l2","tag-video","tag-zynq"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v20.5 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Capturing video with Petalinux - Part 1 - The hardware design<\/title>\n<meta name=\"description\" content=\"Learn to capture video frames from the test pattern generator using petalinux and V4L2. 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